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Transfer Function - Linear Control Systems II- Past Exam Paper, Exams of Linear Control Systems

National Center For Biological Sciences Linear Control Systems

Main points of this past exam are: Digital Control System, Phase Lag Introduced, Bode Plot, Frequency, Maximum Phase-Lead, Resonant Frequency, Digital Processor, Programmed, Phase-Lead Compensator, Transfer Function

Typology: Exams

2012/2013

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EE329 Linear Control Systems II Page 1 of 5

Spring Examinations 2011/2012

Exam Code(s) 3BEI, 3BN, 3BSE (Electrical)

Exam(s) Third Year Engineering Innovation – Electronic

Third Year Electronic Engineering

Third Year Energy Systems Engineering (Electrical)

Module Code(s) EE329

Module(s) Linear Control Systems II

Paper No. 1

Repeat Paper No

External Examiner(s) Prof. G. W. Irwin

Internal Examiner(s) Prof. G. Ó Laighin

Dr. Maeve Duffy

Instructions: Answer any three questions from four.

All questions carry equal marks (20 marks).

Duration 2 hours

No. of Pages 5

Discipline Electrical & Electronic Engineering

Course Co-ordinator(s) Dr. Maeve Duffy

Requirements:

MCQ

Handout

Statistical Tables

Graph Paper

Log Graph Paper

Other Material

Partial preview of the text

Download Transfer Function - Linear Control Systems II- Past Exam Paper and more Exams Linear Control Systems in PDF only on Docsity!

Spring Examinations 2011/

Exam Code(s) 3BEI, 3BN, 3BSE (Electrical)

Exam(s) Third Year Engineering Innovation – Electronic

Third Year Electronic Engineering

Third Year Energy Systems Engineering (Electrical)

Module Code(s) EE

Module(s) Linear Control Systems II

Paper No. 1

Repeat Paper No

External Examiner(s) Prof. G. W. Irwin

Internal Examiner(s) Prof. G. Ó Laighin

Dr. Maeve Duffy

Instructions: Answer any three questions from four.

All questions carry equal marks (20 marks).

Duration 2 hours

No. of Pages 5

Discipline Electrical & Electronic Engineering

Course Co-ordinator(s) Dr. Maeve Duffy

Requirements :

MCQ

Handout

Statistical Tables

Graph Paper

Log Graph Paper

Other Material

The following standard formulas are given and may be freely used:

Mp Mo

 (^) r  (^) n 1  2  (^2) (   0. 707)

 (^) d  (^) n 1  2

 (^) b  (^) n (1 2  2 )  (1 2  2 )  1

Tr ( 0  95 %)  3 /  (^) b (   0. 4)

Tr (0  100%) 

  sin^1 1  2

 (^) n 1  (^2) (   1)

Overshoot  100 exp 

Ts (2%) 

  (^) n

^ (   1)

Ts (5%) 

  (^) n

^ (   1)

Ziegler-Nichols Rules : Proportional control : K = 0.5 Kc

P+I control : K = 0.45 Kc , Ti = 0.83 Tc

PID control: K = 0.6 Kc , Ti = 0.5 Tc , Td = 0.125 Tc

Question 1

An analogue position control system is to be upgraded to a digital controller. Analysis of the

Nichols chart for the analogue system shows that it has a damping factor,  = 0.55 and a

resonant frequency, r = 10 rad/s. In order to compensate for the delay introduced by the

D/A converter, a phase-lead compensator is to be included in the digital controller.

(a) Explain how a zero-order-hold (ZOH) D/A converter operates in a digital control

system. [5 marks]

(b) Suggest a suitable sampling interval, T, for the system described above. [4 marks]

(c) Taking T = 50 ms and given that the maximum phase-lead, 

r 1

m sin^1 ,

calculate a value for r that will maximise compensation for the D/A delay at the

resonant frequency. [4 marks]

(d) Complete the transfer function of the phase-lead compensator, and determine the

value by which the system gain should be reduced so as to maintain resonant

characteristics of the analogue controller. [7 marks]

Question 2

The system shown in Fig. 1 includes an analogue integrator and a digital processor which is

programmed with the algorithm, m(k) = 0.63[e(k)+0.21e(k-1)].

The sampling period of the D/A converter is T = 0.75 s.

Fig. 1

(a) Write expressions for the transfer function of the D/A converter, W(s) , and for the z-

transform of the digital processor, Gc(z). [3 marks]

(b) Represent the system in the z-domain; i.e. draw a block diagram showing individual

z-transform functions for the controller and plant components. [10 marks]

(c) Calculate the steady-state error of the system for a unit ramp input. [7 marks]

Digital processor

D/A

A/D

r(kT) m(kT)^

m(t) c(t)

c(kT)

(s 3 )

s^ 

Question 3

The z-domain representation of a digital controller used to regulate the voltage in a high

performance computer is shown in Fig. 2. The sampling interval is T = 0.4 s.

Fig. 2

(a) Write the closed loop z-transfer function of the system of Fig, 2. Given that one of

the poles is at z = 0.115, calculate the remaining poles and zeroes. [6 marks]

(b) Map the closed-loop poles and zeroes into the s-plane, and based solely on pole

locations in the primary strip, estimate the following quantities for a unit step input:

[10 marks]

(i) percentage overshoot

(ii) ±2% settling time

(c) Comment on how you would expect the system step response to vary from that

predicted in part (b) due to: [4 marks]

(i) choice of sampling interval, T

(ii) the presence of the zero

Question 4

The P+I controller shown in Fig. 3 was designed according to Ziegler-Nichols rules. The

controller is to be replaced with a digital PID controller.

Fig. 3

(a) Explain why the addition of a component of derivative action makes good sense in

this case. [2 marks]

(b) Design an analogue PID controller according to Ziegler-Nichols Rules. [7 marks]

(c) Taking the period of unstable oscillations as a reference, choose a suitable sampling

interval for the digital controller. Apply the bilinear transformation to derive a z-

transform function for the digital processor. [9 marks]

(d) Write the recursive equation required to implement the resulting controller action in

the digital processor. [2 marks]

C(z)

z- 0.

R(z)^ +

z 1. 095 z -0.495z 0.

z

C(s)

5 (s 0. 64 )

R(s) + Gp(s)

Transfer Function - Linear Control Systems II- Past Exam Paper, Exams of Linear Control Systems

Related documents

Partial preview of the text

Download Transfer Function - Linear Control Systems II- Past Exam Paper and more Exams Linear Control Systems in PDF only on Docsity!

Spring Examinations 2011/

Exam Code(s) 3BEI, 3BN, 3BSE (Electrical)

Exam(s) Third Year Engineering Innovation – Electronic

Third Year Electronic Engineering

Third Year Energy Systems Engineering (Electrical)

Module Code(s) EE

Module(s) Linear Control Systems II

Paper No. 1

Repeat Paper No

External Examiner(s) Prof. G. W. Irwin

Internal Examiner(s) Prof. G. Ó Laighin

Dr. Maeve Duffy

Instructions: Answer any three questions from four.

All questions carry equal marks (20 marks).

Duration 2 hours

No. of Pages 5

Discipline Electrical & Electronic Engineering

Course Co-ordinator(s) Dr. Maeve Duffy

Requirements :

MCQ

Handout

Statistical Tables

Graph Paper

Log Graph Paper

Other Material

The following standard formulas are given and may be freely used:

^ (   1)

^ (   1)

Ziegler-Nichols Rules : Proportional control : K = 0.5 Kc

P+I control : K = 0.45 Kc , Ti = 0.83 Tc

PID control: K = 0.6 Kc , Ti = 0.5 Tc , Td = 0.125 Tc

Question 1

An analogue position control system is to be upgraded to a digital controller. Analysis of the

Nichols chart for the analogue system shows that it has a damping factor,  = 0.55 and a

resonant frequency, r = 10 rad/s. In order to compensate for the delay introduced by the

D/A converter, a phase-lead compensator is to be included in the digital controller.

(a) Explain how a zero-order-hold (ZOH) D/A converter operates in a digital control

system. [5 marks]

(b) Suggest a suitable sampling interval, T, for the system described above. [4 marks]

(c) Taking T = 50 ms and given that the maximum phase-lead, 

m sin^1 ,

calculate a value for r that will maximise compensation for the D/A delay at the

resonant frequency. [4 marks]

(d) Complete the transfer function of the phase-lead compensator, and determine the

value by which the system gain should be reduced so as to maintain resonant

characteristics of the analogue controller. [7 marks]

Question 2

The system shown in Fig. 1 includes an analogue integrator and a digital processor which is

programmed with the algorithm, m(k) = 0.63[e(k)+0.21e(k-1)].

The sampling period of the D/A converter is T = 0.75 s.

Fig. 1

(a) Write expressions for the transfer function of the D/A converter, W(s) , and for the z-

transform of the digital processor, Gc(z). [3 marks]

(b) Represent the system in the z-domain; i.e. draw a block diagram showing individual

z-transform functions for the controller and plant components. [10 marks]

(c) Calculate the steady-state error of the system for a unit ramp input. [7 marks]

D/A

A/D

r(kT) m(kT)^

(s 3 )

s^ 

Question 3

The z-domain representation of a digital controller used to regulate the voltage in a high

performance computer is shown in Fig. 2. The sampling interval is T = 0.4 s.

Fig. 2

(a) Write the closed loop z-transfer function of the system of Fig, 2. Given that one of

the poles is at z = 0.115, calculate the remaining poles and zeroes. [6 marks]

(b) Map the closed-loop poles and zeroes into the s-plane, and based solely on pole

locations in the primary strip, estimate the following quantities for a unit step input:

[10 marks]

(i) percentage overshoot

(ii) ±2% settling time

(c) Comment on how you would expect the system step response to vary from that

predicted in part (b) due to: [4 marks]

(i) choice of sampling interval, T

(ii) the presence of the zero