Introduction-Digital-logic - Processor Architecture and Microprogramming - Lecture Slides, Slides of Computer Architecture and Organization

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Introduction to Digital Logic Design

Appendix A of CO&A

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• Boolean Algebra

• Gates

• Combinational Circuits

• Simplifications of Boolean Functions
• Multiplexers, Decoders, PLA, ROM, Adders

• Sequential Circuits

• Flip-Flops
• Registers
• Counters

Outline

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• It defines a set of postulates and another set of identities that can be derived from these postulates
• A NAND E = NOT(AE) = Ā OR Ē. Proof?

Boolean Algebra (Cont)

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• To implement any logic function we need a functionally complete set of gates. Ex (AND, OR, NOT), (AND, NOT), (OR, NOT) (NAND), (NOR)
• How to implement all basic functions by NAND?? Examine its truth table. Same for NOR
• From manufacturing point of view, using only one type of gates to implement the circuit is very advantageous. Why? Regular -> Simple -> easy to design -> cheap
• Gates are the basic building blocks of all digital systems. They are implemented using electronics components (transistors, diodes, resistors, etc.)
• Different families are TTL, CMOS, ECL, etc. Not our problem

Gates

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Combinational Logic Circuits (simplification)

• Simplification: algebraic rules, karnaugh maps, or Quine-McKluskey tables
• The output of Table 3 can be expressed: - F = A’BC’ + A’BC + ABC’ = B(A’+C’) ??
• Problem: algebraic rules depend mainly upon observation & experience
• A more systematic way to simplify digital logic expressions is the use of karnaugh maps

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• The map is an array of 2

n squares (n # of inputs)

• How do you fill the map from a truth table??
• To use an expression, it should be in canonical form
• General rules of using the map:
  • Combine ones into groups of (1, 2, 4, 8, …) squares
  • Form the largest group size
  • Form the min number of groups
  • Two group should not intersect unless this will enable a small group to be larger in size
• Some input combinations shall not occur and in this situation we call the outputs, “do not care” conditions
• These “ds” can be used as either 1 or 0
• Example: designing an incrementer for a BCD number, see Table 4 and Figure 10 in the following slide

Combinational Logic Circuits (Karnaugh)

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• Quine-Mckluskey Algorithm is a systematic method to obtain the minimum form of a Boolean expression
• The details of the algorithm are described in the handout
• The algorithm is best described by an example
• Minimize the following function
• F(A, B, C, D) = Σ ( 1 , 5 , 6 , 7 , 11 , 12 , 13 , 15 )
• This can be expresses as F = A’B’C’D + A’BC’D + A’BCD’ + A’BCD + AB’CD + ABC’D’ + ABC’D + ABCD
• The minimal expression is F = A’C’D + A’BC + ABC’ + ACD
• Quiz: Try it using the decimal approach

Combinational Logic Circuits (QMA)

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• NAND and NOR implementation
• Multiplexer: a circuit that has multiple inputs and only one output. At any time one of the input is selected as output based on the value on the select line(s)
• Below is the truth table for a 4-to-1 multiplexer
• Implementation?? Application ex: Inputs to PC

Applications of Combinational Logic Circuits

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Applications of Combinational Logic (Cont)

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• ROM is considered a combinational circuit because the outputs are a function only of the current inputs

Applications of Combinational Logic (Cont)

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• We can form n-bit adders by cascading n 1-bit adders
• The carry of a unit is fed to the next one (ripple adders)
• The problem with ripple adders is the increasing delay
• The solution is using carry lookahead technique
• C 0 = A 0 B 0
• C 1 = A 1 B 1 + A 1 A 0 B 0 + B 1 A 0
• C 2 , ….. etc.
• Usually a full adder (32-bit say) is constructed from a number of modules (8-bit) adders where the carries are rippled between modules but each module uses carry lookahead to derive internal carry signals.
• Quiz: Design an 8-bit carry lookahead adder using two 4-bit units (derive all internal and external carry signals and draw the final diagram)

Applications of Combinational Logic (Cont)

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Sequential Logic Circuits

• Circuits whose new output depends not only on the current input but also on the past history of that input (in other words on the current output too)
• Basic application: making memory units (Flip-Flops)
• A Flip-Flop is a bistable device that has two outputs (one is the complement of the other: Q and Q’)
• S-R latch: Implementation two NORs with feedback

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Sequential Logic Circuits (Applications)

• Clocked S-R Flip-Flop: Using AND at the input
• D Flip-Flop: One input is negated and used as the second input. Implementation & characteristic table
• J-K Flip-Flop: it differs in that all input combinations are allowed. The last case (J=K=1) causes the output to toggle, a very important feature
• Implementation and table
• Flip-Flips are used to implement registers. There are two types of registers
• A parallel register is a set of 1-bit memories that can be read or written simultaneously. See the following slide
• A shift register implements the shits function. See the following slide

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Sequential Logic Circuits (Applications)