Download Electronics Mock Papers and more Exams Electronics in PDF only on Docsity!
(a) Draw the d.c load line for the circuit given below. Mark the Q-point on the load line at collector current
1 mA. Calculate the voltage at the collector (Vc) and base (Va) of the transistor. Complete the voltage
divider biasing by calculating resistance R using Bof the transistor =100.
(b) Calculate the input and output impedance and a.c voltage gain of the circuit when switch S1 and S
both are open.
(c) If the switch S1 is closed, calculate the input impedance and voltage gain.
(d) Keeping the switch S1 closed, what would be the total circuit a.c voltage gain when the switch S2 is also closed?
100kQ
Vin
R
+20mV
-20mV
1kO
D,
lkO
A
(a) Calculate and draw the output voltage for the circuit given below. Assume the voltage drop across
the diode is 0.7 Vand the a.c resistance of the diode re = 25 mV/La (mA).
5kS
10k(
(-10V)
1kQ
+10v
B
itw
(b) For the circuit shown in Figure below, find current I and voltage V, assuming the voltage drop across
the diode is 0.7 V.
+5V
D,
Vout
+12V
[10]
5 KS
[2]
[3]
- (a) Prove that the maximum stage efficiency for class B push-pull emitter follower ~73%. (b) Class BPush-Pull amplifier has an efficiency of 60% and each transistor has a rating of 2.5W. Find the
d.c. input power and a.c. output power. [3 +2]
- For the given circuit as shown in figure below, findRË and R2. Calculate the range of R, for the transistor (Q:1) to remain in the active region.Assume B=100 for both transistors.Zener voltage Vz = 4V and take I= 2 mA, 1, =5 mA, VEB, = 0.7V = VEB,
V
R,= 56KC
R,= 10KS
- For the class Aamplifier in figure below, draw the d.c load line and a.c load line. Find the peak to
peak a.c compliance of the circuit. Find the maximum load power and the stage efficiency of the
amplifier. Assume Bde =200.
+12 \V
R= 4.7KS
6852
R
R= 56062
RL
C. 0.22 uF
+12V
C=100 uF
Vout
[5]
Speaker 1.5 k£)
[5]
Q3. Sketch the output of the following circuits, Give brief reasons for your answer.
(a)
(b)
(c)
(d)
(e)
V
VcoN
2 mv
3 mv
+5V 4K
5K
IK
Vont?
flov
Vont
Vie
&2K
9t lov
+loV
at
d-jov
Vot 2
+5v
|MA
ov
[2 x5=10]
Vont
’t
>t
Q4. In the adjacent circuit, the Ipss of the FET is 100 uA.
The input voltage Vin = 10 mV. It is observed that when
VcoN =- 4 V, the output voltage is 480 mV. Calculate
the output voltage when VcON =-2V.
The current through the FET follows the equation
Ip = Ipss 1
Vcs VGs(of)
Q5. The following is the circuit of an astable multivibrator using op-amp. The capacitor charging formula is given as Vc= V + (V,-V)1-e RC where Ve, VË and V, are the capacitor
voltage and the initial and final voltage respectively. Using this,
calculate the time period T of the square waveform of this circuit.
8
Pin7 e
Pin
[5]
Pin Pin
[5)
Vin
pin
Vin
D
Q6.(a) Design amonostable multivibrator having pulse width 10 milliseconds using 555 Timer. Calculate
the values of the resistance and capacitance necessary for its monostable operation and describe your
answer with the internal architecture of 555.
D
1KN
D
100
Vcon
(b) It is required tomeasure the time difference of an event with flashing lights signalling the start and the stop of the event. An oscillator of frequency 1 kHz and a frequency counter that counts the pulses from the oscillator are available. Draw the block diagram of the circuit to measure the time difference
between the start and the stop in milliseconds using the above-mentioned components, a R-S flipflop and
ANDgate. Explain briefly the working principle of your circuit.
DO
Q7. (a) Draw the circuit diagram of a 4-bit analog to digital converter using op-amp. Briefly describe the
circuit operation. (S] (b) An Arduino microcontroller is used to operate- the analüg-lu-digilal cunversion using successive approximation method. As shown in the figure below, four digital pins (pin-3 to pin-6) are configured as output to provide digital bits to the inputs of the A-to-D converter. Further, digital pin-7 of the arduino is
configured as an input and is used for the decision making by reading the output from the A-to-D
Converter. Draw the FLOWCHART of the code that you would implement for this A-to-D conversion using the successive approximation method.
47KQ
RT
R
Analog to Digital Converter
+Vcd
-vcc
Ri
Vout
(5]
[S]
[5]
