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Digital design With an introduction to the verilog lab
Typology: Lab Reports
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Experiment No: #
Experiment Name: Simplification and Minterm/Maxterm Representations
Experiment Materials:
7404 Inverter 7411 3-input AND gate 7432 2-input OR gate 7486 2-input XOR gate
Figure 1: Circuit to be simplified
2. The product of maxterm form of the function is: Y=(2,3,4,5,6,7,8,10,12,14). (50p)
a) Write down the Y(a,bc,d) function as a minterm representation, and draw the circuit of this function.
b) Write down the Y(a,bc,d) function as a maxterm representation.