Designers Perspective - Embedded System Design - Lecture Slides, Slides of Computer Science

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Outline

• Introduction to a simple digital camera

• Designer’s perspective

• Requirements specification

• Design

– Four implementations

Design

• Determine system’s architecture
  • Processors
    • Any combination of single-purpose (custom or standard) or general-purpose processors
  • Memories, buses
• Map functionality to that architecture
  • Multiple functions on one processor
  • One function on one or more processors
• Implementation
  • A particular architecture and mapping
  • Solution space is set of all implementations
• Starting point
  • Low-end general-purpose processor connected to flash memory
    • All functionality mapped to software running on processor
    • Usually satisfies power, size, and time-to-market constraints
    • If timing constraint not satisfied then later implementations could:
      • use single-purpose processors for time-critical functions
      • rewrite functional specification

DCT floating-point cost

• Floating-point cost

• DCT uses ~260 floating-point operations per pixel transformation
• 4096 (64 x 64) pixels per image
• 1 million floating-point operations per image
• No floating-point support with Intel 8051
  • Compiler must emulate
    • Generates procedures for each floating-point operation

» mult, add

• Each procedure uses tens of integer operations
• Thus, > 10 million integer operations per image
• Procedures increase code size

• Fixed-point arithmetic can improve on this

Fixed-point arithmetic

• Integer used to represent a real number
  • Constant number of integer’s bits represents fractional portion of real number
    • More bits, more accurate the representation
  • Remaining bits represent portion of real number before decimal point
• Translating a real constant to a fixed-point representation
  • Multiply real value by 2 ^ (# of bits used for fractional part)
  • Round to nearest integer
  • E.g., represent 3.14 as 8-bit integer with 4 bits for fraction
    • 2^4 = 16
    • 3.14 x 16 = 50.24 ≈ 50 = 00110010
    • 16 (2^4) possible values for fraction, each represents 0.0625 (1/16)
    • Last 4 bits (0010) = 2
    • 2 x 0.0625 = 0.
    • 3(0011) + 0.125 = 3.125 ≈ 3.14 (more bits for fraction would increase accuracy)

Fixed-point implementation of

CODEC

• COS_TABLE gives 8-bit fixed-point representation

of cosine values

• 6 bits used for fractional portion
• Result of multiplications shifted right by 6

void CodecDoFdct(void) { unsigned short x, y; for(x=0; x<8; x++) for(y=0; y<8; y++) outBuffer[x][y] = F(x, y, inBuffer); idx = 0; }

static const char code COS_TABLE[8][8] = { { 64, 62, 59, 53, 45, 35, 24, 12 }, { 64, 53, 24, -12, -45, -62, -59, -35 }, { 64, 35, -24, -62, -45, 12, 59, 53 }, { 64, 12, -59, -35, 45, 53, -24, -62 }, { 64, -12, -59, 35, 45, -53, -24, 62 }, { 64, -35, -24, 62, -45, -12, 59, -53 }, { 64, -53, 24, 12, -45, 62, -59, 35 }, { 64, -62, 59, -53, 45, -35, 24, -12 } };

static const char ONE_OVER_SQRT_TWO = 5; static short xdata inBuffer[8][8], outBuffer[8][8], idx;

void CodecInitialize(void) { idx = 0; }

static unsigned char C(int h) { return h? 64 : ONE_OVER_SQRT_TWO;}

static int F(int u, int v, short img[8][8]) {

long s[8], r = 0; unsigned char x, j;

for(x=0; x<8; x++) { s[x] = 0; for(j=0; j<8; j++) s[x] += (img[x][j] * COS_TABLE[j][v] ) >> 6; }

for(x=0; x<8; x++) r += (s[x] * COS_TABLE[x][u]) >> 6; return (short)((((r * (((16*C(u)) >> 6) *C(v)) >> 6)) >> 6) >> 6);

}

void CodecPushPixel(short p) { if( idx == 64 ) idx = 0; inBuffer[idx / 8][idx % 8] = p << 6; idx++; }

Implementation 3: Microcontroller

and CCDPP/Fixed-Point DCT

• Analysis of implementation 3

– Use same analysis techniques as implementation

– Total execution time for processing one image:

• 1.5 seconds

– Power consumption:

• 0.033 watt (same as 2)

– Energy consumption:

• 0.050 joule (1.5 s x 0.033 watt)

• Battery life 6x longer!!

– Total chip area:

• 90,000 gates

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CODEC design

• 4 memory mapped registers
  • C_DATAI_REG / C_DATAO_REG used to push/pop 8 x 8 block into and out of CODEC
  • C_CMND_REG used to command CODEC
    • Writing 1 to this register invokes CODEC
  • C_STAT_REG indicates CODEC done and ready for next block - Polled in software
• Direct translation of C code to VHDL for actual

hardware implementation

• Fixed-point version used
• CODEC module in software changed similar to

UART/CCDPP in implementation 2

static unsigned char xdata C_STAT_REG at 65527; static unsigned char xdata C_CMND_REG at 65528; static unsigned char xdata C_DATAI_REG at 65529; static unsigned char xdata C_DATAO_REG at 65530; void CodecInitialize(void) {} void CodecPushPixel(short p) { C_DATAO_REG = (char)p; } short CodecPopPixel(void) { return ((C_DATAI_REG << 8) | C_DATAI_REG); } void CodecDoFdct(void) { C_CMND_REG = 1; while( C_STAT_REG == 1 ) { /* busy wait */ } }

Rewritten CODEC software

Implementation 4:

Microcontroller and CCDPP/DCT

• Analysis of implementation 4

– Total execution time for processing one image:

• 0.099 seconds (well under 1 sec)

– Power consumption:

• 0.040 watt

• Increase over 2 and 3 because SOC has another

processor

– Energy consumption:

• 0.00040 joule (0.099 s x 0.040 watt)

• Battery life 12x longer than previous implementation!!

– Total chip area:

• 128,000 gates 11

Summary

• Digital camera example

– Specifications in English and executable language

– Design metrics: performance, power and area

• Several implementations

– Microcontroller: too slow

– Microcontroller and coprocessor: better, but still

too slow

– Fixed-point arithmetic: almost fast enough

– Additional coprocessor for compression: fast

enough, but expensive and hard to design 13