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Systems I: Computer
Organization and Architecture
Lecture 8: Registers and Counters
Registers
• A register is a group of flip- flops.
– Each flip- flop stores one bit of data; n flip- flops are
required to store n bits of data.
– There are several different types of registers available
commercially.
– The simplest design is a register consisting only of flip-
flops, with no other gates in the circuit.
• Loading the register – transfer of new data into the
register.
• The flip- flops share a common clock pulse (frequently
using a buffer to reduce power requirements).
• Output could be sampled at any time.
• Clearing the flip-flop (placing zeroes in all its bit) can be
done through a special terminal on the flip- flop.
4-bit Register
D
C
Q
D
C
Q
D
C
Q
D
C
Q
A 0
A 1
A 2
A 3
Clock
Clear
I 0
I 1
I 2
I 3
Registers With Parallel Load
- The clock usually provides a steady stream of pulses
which are applied to all flip-flops in the system.
- A separate control system is needed to determine
when to load a particular register.
- The Register with Parallel Load has a separate load
input.
- When it is cleared, the register receives it output as input.
- When it is set, it received the load input.
4-Bit Shift Register
D
C
Q D
C
Q D
C
Q D
C
Q
Serial Input
Serial Output
Clock
Serial Transfer
• A digital system is operating in a serial mode when
information is transferred and manipulated one bit at
a time, with bits transferred out of the source register
into the destination register.
• This is different from parallel transfer where all the
bits of a register are transferred at once.
• Serial transfer of information from register A to
register B is done with shift registers, where the serial
output from register A serves as the serial input for
register B.
Serial Transfer From Register A to Register B
Shift
Register A
Shift
Register B
SI SO SI SO
CLK CLK
Clock
Shift
control
Clock
Shift
control
CLK
T 1 T 2 T 3 T 4
Serial Transfer – State Table
After T 1 0 1 1 1 0 1 1
4
After T 3 0 1 1 1 0 1 1 0
After T 2 1 1 1 0 1 1 0 0
After T 1 1 1 0 1 1 0 0 1
Initial value 1 0 1 1 0 0 1 0
Timing Pulse Shift Register A Shift Register B
Redesigning the Serial Adder
• We will use a pair of shift registers whose
outputs will be x and y respectively. These are
corresponding bits of the addends.
• S is the sum bit produced and a flip-flop will
hold the carry bit as the flip-flop’s state Q.
• We will implement it using a JK flip-flop
State Table for the Serial Adder
1 1 1 1 1 X 0
1 1 0 1 0 X 0
1 0 1 1 0 X 0
1 0 0 0 1 X 1
0 1 1 1 0 1 X
0 1 0 0 1 0 X
0 0 1 0 1 0 X
0 0 0 0 0 0 X
Q(t) X Y Q(t+1) S JQ KQ
Present State Inputs
Next State Output
Flip-flop Inputs
Karnaugh Map for J Q
00 01 11 10
1
0
Q
xy
1
X X X X
J Q = xy
Karnaugh Map for K Q
00 01 11 10
1
0
Q
xy
1
X X X X
JQ = x’y’ = (x + y)’
Bi-directional Shift Registers
• A shift register that can shift in one direction is
called a unidirectional shift register.
• A shift register that can shift in either direction
is called a bi-directional shift register.
• Some shift register also allow for the simple
transfer of data.
General Shift Register
• The most general shift register have all of these
capabilities:
– An input for clock pulses to synchronize all
operations.
– A shift-right operation and serial line input line
associated with the shift-right.
– A shift- left operation and serial line input line
associated with the shift- left.
– A parallel load operation and n input lines associated
with the parallel transfer.
– n parallel output lines.
– A control state that leaves the information in the
register unchanged even though the clock pulses are
applied.
Function Table For General Shift Register
1 1 Parallel load
1 0 Shift Left (up)
Shift Right
(down)
0 1
0 0 No change
Register
operation
S 0 S 1
Bidirectional Shift Register With Parallel Load
D
C
Q
D
C
Q
D
C
Q
D
C
Q
A 0
A 1
A 2
A 3
Clock
I 0
I 1
I 2
I 3
S 0
S 1
4X
MUX
S 0
S 1
4X
MUX
S 0
S 1
4X
MUX
S 0
S 1
4X
MUX
Serial Input
Serial Input
S 0
S 1
4-Bit Ripple Counter Using T-Type Flip-flop
T C
R
A 0
Count
T C
R
A 1
Reset
Logic-
T C^
R
A 2
T C
R
A 3
4-Bit Ripple Counter Using JK-Type Flip-flop
J C^
R
A 0
Count
J C^
R
A 1
Reset
Logic-
J C^
R
A 2
J C^
R
A 3
K K K K
4-Bit Ripple Counter Using D-Type Flip-flop
D C
R
A 0
Count
Reset
D C
R
A 1
D C
R
A 2
D C
R
A 3
Binary Count Sequence
A 3 A 2 A 1 A 0
Binary Counters
- A counter is a register that goes through a predetermined
sequence of states as input pulses are applied.
- Almost all digital equipment will contain counters; they
are used for counting the occurrences of a particular event
and are useful in generating timing signals.
- An n-bit counter uses n flip- flops and are have any value in
the range 0 to 2
n
-1.
- We notice in our sequences that the lowest significance bit
is complemented with every count and the other bits are
complemented from one count to the next when all the
lower bits are set.
4-bit Synchronous Binary Counter
J
C
Q
J
C
Q
J
C
Q
J
C
Q
A 0
A 1
A 2
A 3
Clock
K
K
K
K
Count
Enable
Output
carry
Up-Down Binary Counter
- A count-down binary counter will go through binary
states in reverse order.
- E.g., a 4-bit count-down binary counter will start at
0000, go to 1111, then 1110, and so on down to 0000.
- As in regular counters, the least significant bit is
always complemented. But higher bits are
complemented only if the lower bits are all 0.
- We can design a counter that can go in either
direction, depending on the control inputs.
4-Bit Up-Down Binary Counter
T C T C T C T C
Clock
Up
Down
A 0
A 1
A 2
A 3
Karnaugh Map For TQ 8
X X
X X X X
1
1
TQ8 = Q 8 Q 1 + Q 4 Q 2 Q 1
Q 8 Q 4
Q 2 Q 1
Karnaugh Map For TQ 4
X X
X X X X
1
1
TQ4 = Q 2 Q 1
Q 8 Q 4
Q 2 Q 1
Karnaugh Map For TQ 2
X X
X X X X
1
TQ2 = Q 8 ’Q 1
1 1
1
Q 8 Q 4
Q 2 Q 1
Karnaugh Map For TQ 1
X X
X X X X
1
TQ1 = 1
1 1
1
Q 8 Q 4
Q 2 Q 1
1 1
1
1
1
1
