Cache Memory: Characteristics, Access Methods, and Organization, Slides of Microprocessor and Assembly Language Programming

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Chapter 4

Cache Memory

Characteristics

• Location
• Capacity
• Unit of transfer
• Access method
• Performance
• Physical type
• Physical characteristics
• Organisation

Capacity

• Word size —The natural unit of organization
• Number of words —or Bytes

Unit of Transfer

• Internal —Usually governed by data bus width
• External —Usually a block which is much larger than a word
• Addressable unit —Smallest location which can be uniquely addressed —Word internally

Access Methods (2)

• Random — Individual addresses identify locations exactly — Access time is independent of location or previous access — e.g. RAM
• Associative — Data is located by a comparison with contents of a portion of the store — Access time is independent of location or previous access — e.g. cache

Memory Hierarchy

• Registers —In CPU
• Internal or Main memory —May include one or more levels of cache —―RAM‖
• External memory —Backing store

Performance

• Access time —Time between presenting the address and getting the valid data
• Memory Cycle time —Time may be required for the memory to ―recover‖ before next access —Cycle time is access + recovery
• Transfer Rate —Rate at which data can be moved

Physical Types

• Semiconductor —RAM
• Magnetic —Disk & Tape
• Optical —CD & DVD
• Others

Organisation

• Physical arrangement of bits into words
• Not always obvious
• e.g. interleaved

The Bottom Line

• How much? —Capacity
• How fast? —Time is money
• How expensive?

So you want fast?

• It is possible to build a computer which uses only static RAM (see later)
• This would be very fast
• This would need no cache —How can you cache cache?
• This would cost a very large amount

Locality of Reference

• During the course of the execution of a program, memory references tend to cluster
• e.g. loops

Cache operation - overview

• CPU requests contents of memory location
• Check cache for this data
• If present, get from cache (fast)
• If not present, read required block from main memory to cache
• Then deliver from cache to CPU
• Cache includes tags to identify which block of main memory is in each cache slot

Cache Design

• Size
• Mapping Function
• Replacement Algorithm
• Write Policy
• Block Size
• Number of Caches