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bca 3rd semester notes 8086 microprocessor and its application
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Intel 8085 Microprocessor architecture – signals – Addressing modes – Instruction classification Instruction set—Timing diagram – ALP format – Programming 8085 – 8-bit and 16-bit Operation including stack-subroutine – Introduction to interrupt handling and related instructions – comparison of 8085 with z80 and 6800.
Basic Concepts of Microprocessors
Differences between: Microcomputer, Microprocessor and Microcontroller
What is micro?
What is a microprocessor?
As a Programmable device:
What is memory?
In this system, the microprocessor is the master and all other peripherals are slaves. The master controls all peripherals and initiates all operations. The buses are group of lines that carry data, address or control signals. The CPU interface is provided to demultiplex the multiplexed lines, to generate the chip select signals and additional control signals. The system bus has separate lines for each signal.
All the slaves in the system are connected to the same system bus. At any time instant communication takes place between the master and one of the slaves. All the slaves have tristate logic and hence normally remain in high impedance state. The processor selects a slave by sending an address. When a slave is selected, it comes to the normal logic and communicates with the processor.
The EPROM memory is used to store permanent programs and data. The RAM memory is used to store temporary programs and data. The input device is used to enter program, data and to operate system. The output device is also used for examining the results. Since the speed of IO devices does not match with speed of microprocessor, an interface device is provided between system bus and IO device.
CENTRAL PROCESSING UNIT:
The CPU consists of ALU (Arithmetic and Logic Unit), Register unit and control unit. The CPU retrieves stored instructions and data word from memory; it also deposits processed data in memory.
a) ALU (Arithmetic and Logic Unit)
This section performs computing functions on data. These functions are arithmetic operations such as additions subtraction and logical operation such as AND, OR rotate etc. Result are stored either in registers or in memory or sent to output devices.
b) REGISTER UNIT:
It contains various register. The registers are used primarily to store data temporarily during the execution of a program. Some of the registers are accessible to the uses through instructions.
c) CONTROL UNIT:
It provides necessary timing & control signals necessary to all the operations in the microcomputer. It controls the flow of data between the p and peripherals (input, output & memory). The control unit gets a clock which determines the speed of the p.
The CPU has three basic functions
Memory
To execute a program:
The user enters its instructions in binary format into the memory.
The microprocessor then reads these instructions and whatever data is needed from memory, executes the instructions and places the results either in memory or produces it on an output device.
The three cycle instruction execution model
To execute a program, the microprocessor ―reads‖ each instruction from memory, ―interprets‖ it, then ―executes‖ it. To use the right names for the cycles
The microprocessor fetches each instruction, decodes it, and then executes it. This sequence is continued until all instructions are performed.
The 8085 Machine Language
The 8085 (from Intel) is an 8-bit microprocessor. The 8085 uses a total of 246 bit patterns to form its instruction set. These 246 patterns represent only 74 instructions. The reason for the difference is that some (actually most) instructions have multiple different formats. Because it is very difficult to enter the bit patterns correctly, they are usually entered in hexadecimal instead of binary.
For example, the combination 0011 1100 which translates into ―increment the number in the register called the accumulator‖, is usually entered as 3C.
Assembly Language
Entering the instructions using hexadecimal is quite easier than entering the binary combinations. However, it still is difficult to understand what a program written in hexadecimal does. So, each company defines a symbolic code for the instructions.
These codes are called ―mnemonics‖.
The mnemonic for each instruction is usually a group of letters that suggest the operation performed.
It is important to remember that a machine language and its associated assembly language are completely machine dependent. In other words, they are not transferable from one microprocessor to a different one.
Assembling” The Program
How does assembly language get translated into machine language?
8085 MICROPROCESSOR ARCHITECTURE
Features of 8085
data bus during the second and third clock cycles. 3 stated during Hold and Halt modes.
ALE (Output) Address Latch Enable
It occurs during the first clock cycle of a machine state and enables the address to get latched into the on chip latch of peripherals. The falling edge of ALE is set to guarantee setup and hold times for the address information. ALE can also be used to strobe the status information. ALE is never 3stated.
SO, S1 (Output)
Data Bus Status. Encoded status of the bus cycle: S1 S0 0 0 HALT 0 1 WRITE 1 0 READ 1 1 FETCH S1 can be used as an advanced R/W status.
RD (Output 3state)
READ: indicates the selected memory or 1/0 device is to be read and that the Data Bus is available for the data transfer.
WR (Output 3state)
WRITE: Indicates the data on the Data Bus is to be written into the selected memory or 1/0 location. Data is set up at the trailing edge of WR. 3 stated during Hold and Halt modes.
READY (Input) If Ready is high during a read or write cycle, it indicates that the memory or peripheral is ready to send or receive data. If Ready is low, the CPU will wait for Ready to go high before completing the read or write cycle.
HOLD (Input) It indicates that another Master is requesting the use of the Address and Data Buses. The CPU, upon receiving the Hold request will relinquish the use of buses as soon as the completion of the current machine cycle. Internal processing can continue.
The processor can regain the buses only after the Hold is removed. When the Hold is acknowledged, the Address, Data, RD, WR, and IO/M lines are stated.
HLDA (Output) HOLD ACKNOWLEDGE indicates that the CPU has received the Hold request and that it will relinquish the buses in the next clock cycle. HLDA goes low after the Hold request is removed. The CPU takes the buses one half clock cycle after HLDA goes low.
INTR (Input) INTERRUPT REQUEST is used as a general purpose interrupt. It is sampled only during the next to the last clock cycle of the instruction. If it is active, the Program Counter (PC) will be inhibited from incrementing and an INTA will be issued. During this cycle a RESTART or CALL instruction can be inserted to jump to the interrupt service routine. The INTR is enabled and disabled by software. It is disabled by Reset and immediately after an interrupt is accepted.
INTA (Output) INTERRUPT ACKNOWLEDGE: is used instead of (and has the same timing as) RD during the Instruction cycle after an INTR is accepted. It can be used to activate the 8259 Interrupt chip or some other interrupt port.
RESTART INTERRUPTS: These three inputs have the same timing as INTR except they cause an internal RESTART to be automatically inserted. RST 7.5 ~~ Highest Priority RST 6.5 RST 5.5 Lowest Priority
TRAP (Input)
Trap interrupt is a nonmaskable restart interrupt. It is recognized at the same time as INTR. It is unaffected by any mask or Interrupt Enable. It has the highest priority of any interrupt.
Vss Ground Reference. Signal Classification of 8085 The signal Classification of 8085 is as shown in fig3.
Fig: 3 Signal Classifications of 8085
System Bus – wires connecting memory & I/O to microprocessor
Unidirectional
Identifying peripheral or memory location
Bidirectional Transferring data
Synchronization signals
Timing signals Control signal
ARCHITECTURE OF INTEL 8085 MICROPROCESSOR
Fig:4 Architecture of intel 8085 microprocessor
Store 8 bit data
Store the result of an operation Store 8 bit data during I/O transfer Address
Flag Register
D7 D6 D5 D4 D3 D2 D1 D S Z X AC X P X CY
Sign Flag
Zero Flag
00000000
Carry 1 0010 0001 Borrow 1 1110 1001
Auxillary Carry Flag
Parity Flag
The Internal Architecture
We have already discussed the general purpose registers, the Accumulator, and the flags.
The Program Counter (PC)
The Stack pointer
Demultiplexing AD7-AD
Given that ALE operates as a pulse during T1, we will be able to latch the address. Then when ALE goes low, the address is saved and the AD7– AD0 lines can be used for their purpose as the bi-directional data lines.
Demultiplexing the Bus AD7 – AD
ADDRESSING MODES
The microprocessor has different ways of specifying the data for the instruction. These are called ―addressing modes‖.
The 8085 has four addressing modes:
Load the accumulator with the contents of the memory location whose address is stored in the register pair BC).
Many instructions require two operands for execution. For example transfer of data between two registers. The method of identifying the operands position by the instruction format is known as the addressing mode. When two operands are involved in an instruction, the first operand is assumed to be in a register Mp itself.
Types of Addressing Modes